1. Field
Exemplary embodiments of the present invention relate to an electrostatic discharge protection circuit.
2. Description of the Related Art
Generally, electrostatic discharge (ESD) refers to a is phenomenon that current momentarily flows between two objects having different electrical potentials and insulated from each other due to a great voltage difference caused when they come into contact with each other.
Such an ESD current may apply a high level of voltage to a semiconductor device, thereby destroying the internal circuits of the semiconductor device. For this reason, semiconductor devices are generally equipped with an electrostatic discharge protection circuit between an input/output pad and an internal circuit to protect the internal circuit.
When a computer including a semiconductor integrated circuit is booted or a mounting test is performed, power noise may occur in a power supply voltage and as a result, high voltage and/or high current may be induced. The high voltage and/or high current induced from power noise enter the inside of a semiconductor integrated circuit through a power pin so as to damage the semiconductor integrated circuit.
The power noise generates the power noise pulse having tens to hundreds of rising times, compared to an electrostatic pulse, from which high voltage and/or high current are induced.
FIG. 1 is a schematic diagram illustrating a conventional electrostatic discharge protection circuit.
Referring to FIG. 1, the electrostatic discharge protection circuit includes a diode chain 110 coupled between a power supply voltage end 101 and a control node A, a control resistor 120 coupled between the control node A and a ground voltage end 102, and a discharge transistor 130 having a drain coupled with the power supply voltage end 101, having a source coupled with the ground voltage end 102, and receiving the voltage of the control node A as an input of a gate.
Hereafter, the operation of the electrostatic discharge protection circuit is described with reference to FIG. 1.
The voltage of the control node A is decided based on the voltage of the power supply voltage end 101. Within a power supply voltage VDD range that a semiconductor integrated circuit properly operates, a diode 111 does not conduct electric current and thus no current flows between the power supply voltage end 101 and the ground voltage end 102. Therefore, the voltage of the control node A equals to a ground voltage VSS. When the diode 111 become conductive (i.e., conduct electric current) in response to approximately 0.7V applied therebetween, the diode chain 110 of FIG. 1 does not conduct electric current until the power supply voltage VDD exceeds a voltage equal to approximately 2.8V since four diodes 111 are serially coupled. Therefore, the discharge transistor 130 is turned off, blocking current from flowing between the power supply voltage end 101 and the ground voltage end 102.
When the voltage of the power supply voltage end 101 is higher than a certain voltage, e.g., approximately 2.8V, due to electrostatic discharge or power noise, the diodes 111 becomes conductive and current flows through the diodes 111.
The current flowing through the diodes 111 flows into the control resistor 120. Thus, voltage drop occurs between both ends of the control resistor 120 and accordingly, the voltage of the control node A is raised. Since the voltage of the control node A is the voltage of a gate of the discharge transistor 130, when the voltages of the control node A increase to be higher than the ground voltage end 102 by a threshold voltage of the discharge transistor 130, the discharge transistor 130 is turned on.
When the discharge transistor 130 is turned on, current flows from the power supply voltage end 101 toward the ground voltage end 102 through the discharge transistor 130. If an excessive amount of charges accumulated in the power supply voltage end 101 is discharged to the ground voltage end 102 in conducting the current, the voltage of the power supply voltage end 101 is stabilized within the operation voltage range of the semiconductor integrated circuit. Through the process, the semiconductor integrated circuit is protected from electrostatic discharge or power noise.
FIG. 2 is a cross-sectional view illustrating the conventional electrostatic discharge protection circuit. Particularly, FIG. 2 shows a cross section of a diode chain 110.
As illustrated in FIG. 2, the diode chain 110 includes a plurality of N-well regions 202 that are formed in a P-type substrate 201, the diodes 111 formed in the N-well regions 202, and resistors 112 coupled between the diodes 111. Each of the diodes 111 is formed in a form of a PN junction by implanting a P-type impurity into a portion 205 of an upper portion of the N-well region 202.
Hereafter, a portion of a P-type substrate 201 where a P-type impurity is doped in a high concentration to facilitate the transfer of a voltage is referred to as a first region 203, and a portion of the N-well regions 202 where an N-type impurity is doped in a high concentration is referred to as a second region 204. A portion of the N-well regions 202 where a P-type impurity is doped in a high concentration to form a PN junction is referred to as a third region 205. A ground voltage VSS is applied to the first region 203 to electrically insulate adjacent diodes 111 from each other.
Here, a parasitic PNP bipolar transistor (PNP BJT) 206 having the third region 205 as an emitter, the N-well region 202 as a base, and the first region 203 as a collector may be formed. The parasitic PNP BJT 206 is turned on to operate with a conductive diode 111 when the voltage of the power supply voltage end 101 is raised. When the parasitic PNP BJT 206 is turned on, part of the current that flows toward the control resistor 120 is discharged to the third region 205 through the parasitic PNP BJT 206. The arrow mark 207 in the drawing signifies the path of leakage current. As a result, the intensity of the current 208 flowing toward the control resistor 120 becomes low and the voltage drop induced between both ends of the control resistor 120 becomes small. This decreases a control voltage and thus the discharge transistor 130 is not turned on so as not to protect the semiconductor integrated circuit. In short, even though electrostatic discharge or power noise occurs, the electrostatic discharge protection circuit may not operate due to the leakage current and the semiconductor integrated circuit may be damaged. In particular, the power noise causes a relatively small voltage change in the power supply voltage end 101 as compared with the electrostatic discharge, but it lasts much longer. Therefore, a conventional electrostatic discharge protection circuit may not effectively protect the integrated circuit from the power noise.
When the number of the diodes 111 is reduced to protect the integrated circuit form the power noise, the diodes 111 may become electrically conductive even at a typical operation voltage level of the semiconductor integrated circuit, and the electrostatic discharge protection circuit may malfunction.